Our lab rethinks computer architecture for emerging workloads that are memory-bound, stateful, and irregular, where conventional throughput-driven designs fall short. We develop predictable, efficient, and verifiable computing systems through rigorous microarchitectural design and hardware-software co-design. The lab is led by Prof. Aruna Jayasena (@ArchFx) and our work spans across AI hardware for large language model inference, acceleration of secure computation such as fully homomorphic encryption, and reconfigurable system software for managing heterogeneous accelerators, aiming to build high-performance platforms with strong guarantees of correctness, efficiency, and resilience.
ARCH Lab is moving to the University of Massachusetts Amherst this fall as our new home. We are currently recruiting motivated PhD and undergraduate researchers to work on next generation computer architectures. If you are interested, please apply here. Current UMass Amherst students are especially encouraged to apply.
Updates
- May 8, 2026 Aruna will join the Department of Electrical and Computer Engineering at the University of Massachusetts Amherst as a tenure-track faculty this Fall. We are actively looking for motivated PhD students to join ARCH Lab. If you are interested in working on future computer architectures, please apply.
- Apr 7, 2026 Aruna will serve as Session Chair for 'Microarchitectural & Cache Side-Channels (Regular Session 7)' and as a judge for both the Hardware Demonstration Competition and the Hardware Hacking Competition at IEEE HOST 2026, taking place on May 6 at the International Ballroom A, Hilton McLean Tysons Corner, VA. Read more...
- Mar 26, 2026 Aruna received the prestigious EDAA Outstanding Dissertation Award in 'New Directions in Safety, Reliability, and Security-Aware Hardware Design, Validation, and Test'. Each year, the European Design Automation Association selects only four dissertations worldwide, and his dissertation was recognized in this category. Read more...